GD25LF255E

FEATURES

◆ 256M-bit Serial Flash ◆ Fast Program/Erase Speed

 - 32M-Byte - Page Program time: 0.25ms typical

 - 256 Bytes per programmable page - Sector Erase time: 30ms typical

 - Block Erase time: 0.1s/0.15s typical

◆ Standard, Dual, Quad SPI, QPI, DTR - Chip Erase time: 64s typical

 - Standard SPI: SCLK, CS#, SI, SO

 - Dual SPI: SCLK, CS#, IO0, IO1 ◆ Flexible Architecture

 - Quad SPI: SCLK, CS#, IO0, IO1, IO2, IO3 - Uniform Sector of 4K-Byte

 - QPI: SCLK, CS#, IO0, IO1, IO2, IO3 - Uniform Block of 32/64K-Byte

 - SPI DTR (Double Transfer Rate) Read

 - 3 or 4-Byte Address Mode ◆ Low Power Consumption

 - 11μA typical standby current

◆ High Speed Clock Frequency - 1μA typical deep power down current

 - 166MHz for fast read

 - Dual I/O Data transfer up to 332Mbits/s ◆ Advanced Security Features

 - Quad I/O Data transfer up to 664Mbits/s - 128-bit Unique ID for each device

 - QPI Mode Data transfer up to 664Mbits/s - Serial Flash Discoverable parameters (SFDP) register

 - DTR Quad I/O Data transfer up to 832Mbits/s - 2x1024-Byte Security Registers With OTP Locks

◆ Software Write Protection ◆ Single Power Supply Voltage

 - Write protect all/portion of memory via software - Full voltage range: 1.65-2.0V

 - Top/Bottom Block protection

◆ Package Information

◆ Endurance and Data Retention - WSON8 (6x5mm)

 - Minimum 100,000 Program/Erase Cycles - WLCSP 4-4 ball array

 - 20-year data retention typical

◆ Allows XiP (eXecute In Place) Operation

 - High speed Read reduce overall XiP instruction fetch time

 - Continuous Read with Wrap further reduce data latency to

 fill up SoC cache

GENERAL DESCRIPTIONS

The GD25LF255E (256M-bit) Serial flash supports the standard Serial Peripheral Interface (SPI), and the Dual/Quad SPI: 

Serial Clock, Chip Select, Serial Data I/O0 (SI), I/O1 (SO), I/O2, I/O3. The Dual I/O data is transferred with speed of 

332Mbit/s, and the Quad I/O data is transferred with speed of 664Mbit/s. The DTR Quad I/O data is transferred with speed 

of 832Mbits/s.