GD9FU4GxF4B

FEATURES

◆Single level cell technology ◆ Advantage Feature

- cache read 

◆ ONFI 1.0 Compatible - multi-plane operation

◆ Power Supply Voltage ◆ Operating Current

-VCC = 1.7v ~ 1.95v -Read(Typ): 15mA

-VCC = 2.7v ~ 3.6v -Program(Typ): 15mA

-Erase(Typ): 15mA

◆ Memory Cell Organization -Standby(max): 50uA per LUN for CMOS

-Page size: 

X8: 4K + 256 bytes ◆ Reliability

X16: 2K + 128 words -P/E cycles with ECC: 50K

-Block size: 64 Pages -Data retention: 10 Years

X8: 256K + 16K bytes

X16: 128K + 8K words ◆ ECC Requirement

-Plane size: 1024 blocks -8bit/512 byte

-Device size: 

4Gb:2048 blocks ◆ Operating Temperature

8Gb:4096 blocks -Industrial: -40C ~ 85C

◆ Page Read / Program time ◆ Chip Enable Don’t Care Option

-Random Read Time (tR): 25us Max.

-Sequential Access Time ◆ Security

3.3v Device: 25ns Min. -OTP area

1.8v Device: 30ns Min. -UID

-Page Program (tPROG): 300us Typ.

◆ Package

◆ Block Erase -TSOPI 48 12mm x 20mm

-Block Erase Time(tBERS): 3ms Typ. - FBGA 63 9mm x 11mm

- FBGA 67 6.5mm x 8mm

GENERAL DESCRIPTION

GigaDevice GD9Fx4GxF4B/GD9Fx8GxE4B is 4Gbit/8Gbit capacity. A program operation can be performed in typical

tPROG on each page and an erase operation can be performed in typical tBERS on each block. Data in the page can be 

read out at tRC cycle time per byte. The I/O pins serve as the ports for address and data input/output as well as command 

input.