U74HC73

DESCRIPTION 

The U74HC73 is a dual J-K negative-edge-triggered flip-flop. 

The clear ( CLR ) input can reset the output at a low level, 

regardless of the level of others inputs. when the CLR is 

inactive(high), data at the data inputs meeting the set-up time 

requirements are transferred to the outputs on the negative-going 

edge of the clock pulse. Following the hold-time interval, data J and 

k inputs can be changed without affecting the levels at the outputs. 

FEATURES 

* Wide supply voltage range from 2.0V to 6.0V 

* Low static power consumption; ICC=4μA (Max.)