CTH1804PS-T52

Features 

 Drain-Source Breakdown Voltage VDSS-40V

 Drain-Source On-Resistance

RDS(ON) 35m, at VGS= -10V, ID= -12A

RDS(ON) 57m, at VGS= -4.5V, ID= -6A

 Continuous Drain Current at TC=25℃ID =-18.6A

 Advanced high cell density Trench Technology

 RoHS Compliance & Halogen Free

Applications 

 Load Switch

 DC/DC Converter 

 LCD Display inverter

Description

The CTH1804PS-T52 is the P-Channel logic 

enhancement mode power field effect transistors 

are produced using high cell density, DMOS trench 

technology. This high density process is especially 

tailored to minimize on-state resistance.