U74HC4094

DESCRIPTION 

 The U74HC4094 consists of an 8-stage shift register and an

8-stage D-type latch with 3-stage parallel outputs. Data is shifted 

serially through the shift register on the positive-going clock

transition of the input singal. The output of the last stage QS1 can 

be used to cascade several devices. 

 The output of QS1 is transferred to a second output(QS2) 

on the following negative-going clock transition of the input singal.

The data of each stage of the shift register is provided with a latch

whose data on the negative going transition of the Strobe input 

signal. When the strobe input is held high, data propagates 

through the latch to a 3-state output buffer. 

 The buffer is enabled when Output Enable input is taken 

high. 

FEATURES 

* Operate from 2.0V to 6.0V 

* Low Power Dissipation ICC=4μA(Max) 

* High Noise Immunity Characteristic of CMOS Devices

规格书U74HC4094